Silicon-on-Insulator (SOI) lateral diffused MOSFETs (LDMOSFETs) are increasingly used as output power devices in RF power amplifiers for base stations for high power output with a drain to source breakdown voltage of 60 V. Such applications require supply voltages of 7 V to 36 V, frequency range of 1 MHz to 2 GHz, and a high peak power of 350 W. SOI provides an advantage of providing high resistivity substrate capabilities (as high as 10 kOhm-cm), leading to substantially reduced RF losses. In addition, SOI provides superior isolation, reduced parasitic capacitances, and leakage currents compared to conventional technologies. The insulator layer in the SOI structure is usually SiO2. Thus, the thermal performance of the SOI structure is limited by the thermal conductivity (TC) of SiO2, which is 1.3 W/mK (including a 200 nm interface), often leading to self-heating in power devices. Thermal conductivity also shows an increase of about 10% over the range of 0-200° C. Therefore, improved SOI substrate structures are needed.